Bluetooth, Wi-Fi, LTE, and 5G technologies have made wireless connectivity more accessible than ever. Each of these technologies has its own unique features and advantages, but when designing IoT systems, engineers often face the decision of whether to integrate wireless functions into a single chip or use an external solution. As IoT applications become more advanced, integrating wireless capabilities into SoCs is becoming increasingly beneficial. Low-power Bluetooth, in particular, has emerged as the go-to standard for wearables, tracking devices, and smart IoT applications. With the introduction of Bluetooth 5, we’re seeing expanded range, faster data rates, and enhanced communication beyond simple peer-to-peer connections, making it ideal for smart home environments.
According to a recent survey by Synopsys, IoT SoC designs saw significant growth between 2013 and 2015, driven by the rise of wearable device ICs. Another study from Teardown.com found that in over 800 mobile and wearable products dismantled between 2012 and 2015, the number of wireless chips exceeded the actual number of devices, indicating that multiple wireless ICs were often used in a single design. This trend highlights how the growing demand for wearables and smart hardware is pushing designers to explore integrated wireless solutions, which can help reduce both cost and power consumption in IoT SoCs.
This article explores the benefits of integrating wireless technologies—such as low-power Bluetooth—into a single-chip SoC, offering a complete solution with optimized physical layer (PHY) and link-layer IP.
**Wireless System Architecture**
Over the past few years, several wireless deployment options have emerged:
- **Standalone RF Transceiver**: In this traditional approach, the transceiver contains the controller and PHY, or link layer and PHY (for Bluetooth). It connects to a main SoC that handles the software stack and application code.
- **Wireless Network Processor**: This architecture embeds a wireless protocol stack into the RF transceiver, allowing the main SoC to focus on application tasks. It brings added value to the wireless chipset.
- **Fully Integrated Wireless SoC**: A single-chip solution designed for specific wireless technologies like low-power Bluetooth. The link layer, PHY, and all software stacks are embedded within the same chip.
- **Wireless Combo Chipset**: Combines multiple wireless technologies (e.g., Wi-Fi and Bluetooth) in a single transceiver, connected to a separate SoC with a digital modem. All software and application code reside in external memory.
Process technology plays a key role in determining the best implementation. Standalone RF transceivers typically use older nodes like 180nm, while wireless network processors often use 90nm. Integrated wireless solutions using 40nm and 55nm are gaining traction due to better embedded flash and mixed-signal IP availability. Fully integrated SoCs tend to use 28nm nodes, combining the protocol stack, RF, and application code into one chip.
For mobile processors, combo chips remain popular because they optimize area and cost using advanced process nodes. However, they require up to three chips, compared to just one or two in other architectures. This shows how matching process nodes with available IP can bring significant benefits, driving the adoption of fully integrated wireless SoCs.
**Industrial Application Case**
In current wearable designs, such as fitness trackers, a SoC is often connected to an external low-power Bluetooth IC via UART or I2C. Similarly, VR glasses communicate with controllers through a standard Bluetooth network processor. External Bluetooth chips are also common in smart home devices like door locks and beacons. These examples illustrate the potential for integrating wireless functions directly into SoCs, leading to cost reductions and improved performance.
If higher bandwidth is needed, combo chips that combine Wi-Fi, Bluetooth, and external memory can be used. For instance, AR glasses require more processing power, so designers often rely on mobile platform architectures.
Wireless capabilities are gradually replacing traditional interfaces like UART, I2C, SPI, and USB for low-bandwidth communication. Low-power Bluetooth is particularly effective for transmitting small amounts of data reliably and efficiently.
**Benefits of Integrating Wireless Technology in SoC**
Integrated wireless solutions offer numerous advantages, including lower power consumption, reduced cost, smaller size, and lower latency. Compared to using an SPI bus, data transmission via AMBA AHB can reduce latency by 5–10 cycles, extending idle time and saving power. According to a Microsoft research report, the key factor in power consumption isn't active or standby current, but the time it takes to reconnect after a sleep cycle and how long the RF module remains dormant.
Beyond power and latency, integration reduces the need for extra chips, pins, and power management IP, lowering packaging costs by over $0.15 and cutting down on 20–30 pins. These savings, along with reduced PCB space and fewer duplicate components, make integrated SoCs even more appealing.
In some cases, like VR glasses, both Bluetooth and Wi-Fi are combined in a single chip, though their requirements differ. Wi-Fi supports high bandwidth (up to 300 Mbps), while low-power Bluetooth minimizes energy use. Bluetooth 5 operates at 2 Mbps with less than 10uW of power, using lower voltages like 0.9V in 40nm and 55nm processes.
The benefits of integrating low-power Bluetooth are clear, and we expect fully integrated wireless SoCs to become more common. For IoT applications requiring ultra-low power, 55nm and 40nm technologies provide excellent advantages, especially when paired with power management techniques like DC-DC buck converters and thick oxide layers.
**Complete Low-Power Bluetooth PHY and Link Layer IP**
Synopsys offers a wide range of wireless and analog IP solutions, including Bluetooth, Wi-Fi, LTE, and 802.15.4. Their DesignWare Bluetooth IP solution includes a PHY and link layer compatible with the latest Bluetooth specifications, supporting Bluetooth 5 and IEEE 802.15.4 for ZigBee and Thread networks.
The link layer enables secure, encrypted connections and supports eight simultaneous links, ensuring compatibility with third-party stacks and processors. The PHY can operate at voltages below 1V, featuring integrated matching networks and a "pin-to-antenna" interface to simplify design and reduce BOM costs.
Available at 180nm, 55nm, and 40nm nodes, the Bluetooth IP helps designers leverage advanced process technologies for better power, area, and performance. For IoT SoCs, the 55nm and 40nm versions are especially advantageous due to their low power and compact size.
Certified by the Bluetooth SIG, the DesignWare Bluetooth Low Energy IP undergoes rigorous validation, including full design verification, product verification tests (PVTs), and ecosystem interoperability checks. This ensures reliability and success for designers aiming to create robust, future-proof IoT systems.
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